HI5701 データシートの表示（PDF） - Renesas Electronics
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HI5701 Datasheet PDF : 12 Pages
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HI-5701
Timing Waveforms
COMPARATOR DATA
ENCODED DATA IS
IS LATCHED
LATCHED INTO THE
OUTPUT REGISTERS
CLOCK
INPUT
PHASE - HIGH
2
1
2
1
2
1
2
1
2
CLOCK
INPUT
PHASE - LOW
ANALOG
INPUT
SAMPLE
N-2
AUTO
BALANCE
tAB
SAMPLE
N-1
tS
AUTO
BALANCE
SAMPLE
N
AUTO
BALANCE
SAMPLE
N+1
AUTO
BALANCE
SAMPLE
N+2
tAP
DATA
OUTPUT
DATA N - 4
tAJ
DATA N - 3
DATA N - 2
tH
tOD
DATA N - 1
DATA N
FIGURE 1. INPUT-TO-OUTPUT TIMING
CE1
CE2
tDIS
tEN
D0 - D5
DATA
HIGH
IMPEDANCE
tDIS
tEN
DATA
HIGH
IMPEDANCE
DATA
OVF
DATA
HIGH
IMPEDANCE
DATA
FIGURE 2. OUTPUT ENABLE TIMING
FN2937 Rev 1.00
September 9, 2005
Page 5 of 12
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