CS82C50A-5Z データシートの表示（PDF） - Renesas Electronics

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CS82C50A-5Z

CMOS Asynchronous

Renesas Electronics 

82C50A

Timing Waveforms (Continued)

DOSTR/DOSTR (WR MCR)

NOTE 1

RTS, DTR

OUT1, OUT2

ACTIVE

tMDO

(42)

ACTIVE

tMDO

(42)

CTS, DST, DCD

INTERRUPT

(43) tSIM

DISTR/DISTR (RD MSR)

NOTE 2

RI

NOTES:

1. See Write Cycle Timing.

2. See Read Cycle Timing.

tRIM

(44)

tSIM

(43)

ACTIVE

tRIM

(44)

tSIM

(43)

FIGURE 10. MODEM CONTROLS TIMING

Revision History

The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make

sure that you have the latest revision.

DATE

REVISION

CHANGE

August 19, 2015

FN2958.6

Added Rev History beginning with Rev 6.

Added About Intersil Verbiage.

Updated Ordering Information on page 2.

About Intersil

Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products

address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.

For the most updated datasheet, application notes, related documentation and related parts, please see the respective product

information page found at www.intersil.com.

You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.

Reliability reports are also available from our website at www.intersil.com/support

FN2958 Rev.6.00

August 19, 2015

Page 23 of 25

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