MTL001 データシートの表示（PDF） - Myson Century Inc

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コンポーネント説明

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MTL001

XGA Flat Panel Controller

Myson Century Inc 

MYSON

TECHNOLOGY

MTL001

(Rev. 0.95)

S

T

A

R

SLAVE

T ADDRESS

WORD

ADDRESS

SDA

WA

A

C

C

K

K

S

T

O

DATA

P

A

C

K

Fig. 3.5.2 Random Write

¨ Sequential Write

The initial step of Sequential Write is the same as Random Write, after the receipt of each word data,

MTL001 will respond with an Acknowledge and then internal address counter will increment by one for next

data write. If the master stops writing data, it will generate stop condition. Ref. Fig. 3.5.3.

S

T

A

R

T

SLAVE

ADDRESS

WORD

ADDRESS

SDA

WA

A

C

C

K

K

DATA n

DATA n+1

A

A

C

C

K

K

S

T

O

DATA n+x P

A

C

K

Fig. 3.5.3 Sequential Write

¨ Current Address Read

MTL001 contains an address counter which maintains the last access address incremented by one. If the last

access address is n, the read data should access from address n+1. Upon receipt of the slave address with

R/W bit set to 1, MTL001 generates an Acknowledge and transmits the eight bits data. After receiving data

the master will generate a stop condition instead of an Acknowledge. Ref. Fig. 3.5.4.

S

T

A

R

T

SDA

SLAVE

ADDRESS

S

T

DATA

O

P

RA

C

K

Fig. 3.5.4 Current Address Read

Revision 0.95

- 18 -

2000/06/14

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