FAN5355UC08X データシートの表示（PDF） - ON Semiconductor

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FAN5355UC08X

1.1 A / 1 A / 0.8 A, 3 MHz Digitally Programmable Regulator

ON Semiconductor 

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above

the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended

exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings

are stress ratings only.

Symbol Parameter

AVIN, SW, PVIN Pins

VCC

Other Pins

ESD

Electrostatic Discharge

Protection Level

Human Body Model per JESD22-A114

Charged Device Model per JESD22-C101

TJ

TSTG

TL

Junction Temperature

Storage Temperature

Lead Soldering Temperature, 10 Seconds

Note:

6. Lesser of 6.5V or AVIN+0.3V.

Min.

-0.3

-0.3

–40

–65

Max.

6.5

AVIN + 0.3(6)

3.5

1.5

+150

+150

+260

Unit

V

V

KV

KV

°C

°C

°C

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating

conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding

them or designing to absolute maximum ratings.

Symbol Parameter

Min.

Max.

Unit

VIN

f

VCCIO

TA

TJ

Supply Voltage

Frequency Range

SDA and SCL Voltage Swing(7)

Ambient Temperature

Junction Temperature

2.7

5.5

V

2.7

3.3

MHz

2.5

V

–40

+85

°C

–40

+125

°C

Note:

7. The I2C interface operates with tHD;DAT = 0 as long as the pull-up voltage for SDA and SCL is less than 2.5 V. If voltage

swings greater than 2.5 V are required (for example if the I2C bus is pulled up

increased to 80 ns. Most I2C masters change SDA near the midpoint between

to VIN), the minimum

the falling and rising

tHD;DAT

edges

must be

of SCL, which

provides ample tHD;DAT .

Dissipation Ratings(8)

Package

Molded Leadless Package (MLP)

θJA(9) Power Rating at TA ≤ 25°C Derating Factor > TA = 25ºC

49ºC/W

2050 mW

21 mW/ºC

Wafer-Level Chip-Scale Package (WLCSP) 110ºC/W

900 mW

9 mW/ºC

Notes:

8. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any

allowable ambient temperature is PD = [TJ(max) - TA ] / θJA.

9. This thermal data is measured with high-K board (four-layer board according to JESD51-7 JEDEC standard).

© 2008 Fairchild Semiconductor Corporation

4

FAN5355 • Rev. 1.1.7

www.fairchildsemi.com

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