M2V56S20AKT データシートの表示（PDF） - MITSUBISHI ELECTRIC

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M2V56S20AKT

256M Synchronous DRAM

MITSUBISHI ELECTRIC  

SDRAM (Rev.1.31)

Single Data Rate

Apr. '02

MITSUBISHI LSIs

M2V56S20/ 30/ 40 ATP

M2V56S20/ 30/ 40 AKT

256M Synchronous DRAM

[ Read Interrupted by Precharge ]

A burst read operation can be interrupted by a precharge of the same bank . READ to PRE interval is

minimum 1 CLK.

A PRE command to output disable latency is equivalent to the /CAS Latency.

CL=2

CLK

Command

DQ

Command

DQ

Command

DQ

Read Interrupted by Precharge (BL=4)

READ

PRE

Q0 Q1 Q2

READ

PRE

Q0 Q1

READ PRE

Q0

CL=3

Command

DQ

Command

DQ

Command

DQ

READ

PRE

Q0 Q1 Q2

READ

PRE

Q0 Q1

READ PRE

Q0

MITSUBISHI ELECTRIC

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