RIMR2: Receive Interrupt Mask Register 2
MSB
SEFE
RCLC
RBLC
FERR
FECS
DS2182A T1 Line Monitor Chip
OOFCS
CRCCS
LSB
BPVCS
NAME
SEFE
RCLC
RBLC
FERR
FECS
OOFCS
CRCCS
BPVCS
POSITION
RIMR2.7
RIMR2.6
RIMR2.5
RIMR2.4
RIMR2.3
RIMR2.2
RIMR2.1
RIMR2.0
FUNCTION
Severely Errored Framing-Event Mask
0 = interrupt masked
1 = interrupt enabled
Receive Carrier Loss Clear Mask
0 = interrupt masked
1 = interrupt enabled
Receive Blue Alarm Clear Mask
0 = interrupt masked
1 = interrupt enabled
Frame Bit Error Mask
1 = interrupt enabled
0 = interrupt masked
Frame Error-Count Saturation Mask
1 = interrupt enabled
0 = interrupt masked
Out-of-Frame Count Saturation Mask
1 = interrupt enabled
0 = interrupt masked
CRC Count Saturation Mask
1 = interrupt enabled
0 = interrupt masked
Bipolar Violation Count Saturation Mask
1 = interrupt enabled
0 = interrupt masked
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