CAV24C64C4CTR(2016) データシートの表示（PDF） - ON Semiconductor

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CAV24C64C4CTR
(Rev.:2016)

64-Kb I2C CMOS Serial EEPROM

ON Semiconductor 

CAV24C64

BUS ACTIVITY: S

T

A

MASTER R

T

SLAVE

ADDRESS

ADDRESS

BYTE

a15 − a8

ADDRESS

BYTE

a7 − a0

DATA

BYTE

S

T

O

d7 − d0

P

S

** *

P

SLAVE

A

A

A

A

C

C

C

C

K

K

K

K

*a15 − a13 are don’t care bits.

Figure 6. Byte Write Sequence

SCL

SDA

8th Bit

Byte n

ACK

tWR

STOP

CONDITION

Figure 7. Write Cycle Timing

START

CONDITION

ADDRESS

BUS

ACTIVITY: S

T

A

MASTER R

T

S

SLAVE

ADDRESS

ADDRESS

BYTE

ADDRESS

BYTE

DATA

BYTE

n

SLAVE

A

A

A

A

C

C

C

C

K

K

K

K

Figure 8. Page Write Sequence

DATA

BYTE

n+1

AA

CC

KK

DATA

S

BYTE

T

n+P

O

P

P

A

C

K

ADDRESS

BYTE

DATA

BYTE

1

8

9

1

8

SCL

SDA

a7

a0

d7

d0

tSU:WP

WP

tHD:WP

Figure 9. WP Timing

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