PSMN005-30K データシートの表示（PDF） - NXP Semiconductors.

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PSMN005-30K

N-channel TrenchMOS SiliconMAX logic level FET

NXP Semiconductors. 

NXP Semiconductors

PSMN005-30K

N-channel TrenchMOS SiliconMAX logic level FET

7. Package outline

SO8: plastic small outline package; 8 leads; body width 3.9 mm

SOT96-1

D

y

Z

8

c

5

E

A

X

HE

vM A

pin 1 index

1

e

A2

A1

4

bp

wM

Q

(A 3)

A

θ

Lp

L

detail X

0

2.5

5 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A

UNIT max. A1

A2

A3

bp

c

D(1) E(2)

e

HE

L

Lp

Q

v

w

y

Z (1)

θ

mm

1.75

0.25

0.10

1.45

1.25

0.25

0.49

0.36

0.25

0.19

5.0

4.8

4.0

3.8

1.27

6.2

5.8

1.05

1.0

0.4

0.7

0.6

0.25 0.25

0.1

0.7

0.3

8o

inches

0.069

0.010

0.004

0.057

0.049

0.01

0.019 0.0100

0.014 0.0075

0.20

0.19

0.16

0.15

0.05

0.244

0.228

0.041

0.039

0.016

0.028

0.024

0.01

0.01

0.004

0.028

0.012

0o

Notes

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

OUTLINE

VERSION

SOT96-1

IEC

076E03

REFERENCES

JEDEC

JEITA

MS-012

EUROPEAN

PROJECTION

ISSUE DATE

99-12-27

03-02-18

Fig 15. Package outline SOT96-1 (SO8)

PSMN005-30K_1

Product data sheet

Rev. 01 — 17 November 2009

© NXP B.V. 2009. All rights reserved.

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