LTC2298IUP データシートの表示（PDF） - Linear Technology

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LTC2298IUP

Dual 14-Bit, 65/40/25Msps Low Power 3V ADCs

Linear Technology 

W

FUNCTIONAL BLOCK DIAGRA

LTC2298/LTC2297/LTC2296

AIN+

INPUT

AIN–

S/H

FIRST PIPELINED

ADC STAGE

SECOND PIPELINED

ADC STAGE

THIRD PIPELINED

ADC STAGE

FOURTH PIPELINED

ADC STAGE

FIFTH PIPELINED

ADC STAGE

SIXTH PIPELINED

ADC STAGE

VCM

2.2µF

1.5V

REFERENCE

RANGE

SELECT

REF

SENSE

BUF

SHIFT REGISTER

AND CORRECTION

REFH

REFL INTERNAL CLOCK SIGNALS

DIFF

CLOCK/DUTY

CONTROL

REF

CYCLE

LOGIC

AMP

CONTROL

REFH 0.1µF REFL

2.2µF

1µF

1µF

CLK

MODE SHDN

OE

Figure 1. Functional Block Diagram (Only One Channel is Shown)

OUTPUT

DRIVERS

OVDD

OF

D13

•

•

•

D0

OGND

229876 F01

229876fa

13

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