CXA2055P 데이터 시트보기 (PDF) - Sony Semiconductor

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CXA2055P

Preamplifier for High Resolution Computer Display

Sony Semiconductor 

2) Register map

• Slave address : 40H

• “∗” indicates undefined.

• Values inside parentheses ( ) are the initial setting values (during power-on reset)

(undetermined when not indicated)

BIT8

0

BIT7

1

Slave address configuration

BIT6

0

BIT5

0

BIT4

0

BIT3

0

BIT2

0

BIT1

R/W

CXA2055P

SUB ADDRESS

00H

01H

02H

03H

04H

05H

06H

07H

08H

09H

0AH

0BH

0CH

0DH

BIT7

∗

BLK (0)

MODE

BRT

SW (0)

0EH

∗

BIT6

∗

BIT5

BIT4

BIT3

CONTRAST

SUB CONTRAST R

SUB CONTRAST G

SUB CONTRAST B

OSD GAIN

BRIGHTNESS R (DA)

BRIGHTNESS G

BRIGHTNESS B

CUT OFF RGB

CUT OFF R

CUT OFF G

CUT OFF B

BIT2

BIT1

BIT0

BRT MODE (2)

∗

BLANKING LEVEL (0)

SYNC

POL (0)

∗

VDET POWER

MODE (0) SAVE (0)

∗

∗

∗

D/A

TEST (0)

CLP (0)

PINSW2

(0)

VDET LEVEL

PINSW1 PINSW0

(0)

(0)

—12—

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