CXA2055P 데이터 시트보기 (PDF) - Sony Semiconductor

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CXA2055P

Preamplifier for High Resolution Computer Display

Sony Semiconductor 

CXA2055P

Notes on Board Pattern and Layout

1. When not using the OSD, YS or BLK pins, connect these pins to GND.

2. Care should be taken for the following items regarding the output signals from R, G and BOUT.

1) Connect these signal lines so that they are high impedance to external circuits.

2) Do not allow current to flow into the IC side.

3) Arrange the signal lines so that the distance to the power amplifier is as short as possible.

3. The VCC1 and VCC2 decoupling capacitors should consist of ceramic capacitors and electrolytic capacitors

connected in parallel, and should be connected as close to the IC as possible.

4. The R, G and BIN clamp capacitors should be located as close to the IC as possible.

5. The sample-and-hold capacitors connected to the R, G and B-S/H pins should be connected as close to the

IC as possible.

6. The output signals from COFF-R, G and B should be arranged so that capacitance of 20 pF or more is not

applied to the pins or the pattern.

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