¡ Semiconductor
MSM82C59A-2RS/GS/JS
(6) Operation Command Words (OCW1 thru OCW3)
When Initialization Command Words (ICWs) are programmed in the MSM82C59A-2, the
interrupt input line is ready to receive interrupt requests. The Operation Command Words
(OCWs) enable the MSM82C59A-2 to be operated in various modes while the device is in
operation.
(i) Operation Command Word 1 (OCW1)
OCW1 sets and resets the mask bits of the Interrupt Mask Register (IMR). M0 thru M7
represent 8 mask bits. The channel is masked when M = 1, but is enabled when M = 0.
(ii) Operation Command Word 2 (OCW2)
R, SL, EOI: The Priority Rotation and End of Interrupt mode plus combinations of the
two are controlled by combinations of these 3 bits. These combinations are
listed in the operation command word format table.
L2, L1, L0: These bits indicate the specified interrupt level when SL = 1.
(iii) Operation Command Word 3 (OCW3)
ESMM: This enables the Special Mask Mode. The special mask mode can be set and
reset by the SMM bit when ESMM = 1. The SMM bit is ignored when ESMM
= 0.
SMM: (Special Mask Mode)
The MSM82C59A-2 is set to Special Mask Mode when ESMM = 1 and SMM =
1, and is returned to normal mask mode when ESMM = 1 and SMM = 0. SMM
is ignored when ESMM = 0.
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