HS-565ARH(1996) 데이터 시트보기 (PDF) - Intersil
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HS-565ARH Datasheet PDF : 10 Pages
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HS-565ARH
OUT
SYNC
PULSE
IN PULSE
GENERATOR
GENERATOR
NO. 1
TRIG
NO. 2
OUT
OUT
20V ± 20%
A
BIAS
HS-565ARH
24
8
TURN ON
23
.
.
.
. 9.95K
.
.
.
.
.
.
~100 .
kHz .
.
14
11
TURN OFF
5K
10
NC
5K
9
2.5K
B+
-
C
STROBE IN
D
COMPARATOR
OUT
P 13 2mA
5
5V
LSB
12
90
200K
DVM
10
0.1µF
VLSB
SUPPLY
FIGURE 5A.
+3V
A
0V
0V
B
-400mV
(TURN OFF)
2V
C
0.8V
4V
D
0V
50%
tX
50%
-0.50LSB
DIGITAL
INPUT
DAC
OUTPUT
SETTLING TIME
tD = COMPARATOR DELAY
COMP.
STROBE
“EQUAL BRIGHTNESS”
COMP.
OUT
FIGURE 5B.
Other Considerations
Grounds
The HS-565ARH has two ground terminals, pin 5 (REF GND)
and pin 12 (PWR GND). These should not be tied together
near the package unless that point is also the system signal
ground to which all returns are connected. (If such a point
exists, then separate paths are required to pins 5 and 12).
The current through pin 5 is near zero DC (Note); but pin 12
carries up to 1.75mA of code - dependent current from bits
1, 2, and 3. The general rule is to connect pin 5 directly to
the system “quiet” point, usually called signal or analog
ground. Connect pin 12 to the local digital or power ground.
Then, of course, a single path must connect the analog/
signal and digital/power grounds.
NOTE: Current cancellation is a two step process within the HS-
565ARH in which code dependent variations are eliminated,
the resulting DC current is supplied internally. First an
auxiliary 9-bit R-2R ladder is driven by the complement of the
DACs input code. Together, the main and auxiliary ladders
draw a continuous 2.25mA from the internal ground node, re-
gardless of input code. Part of the DC current is supplied by
the zener voltage reference, and the remainder is sourced
from the positive supply via a current mirror which is laser
trimmed for zero current through the external terminal (pin 5).
Layout
Connections to pin 9 (IOUT) on the HS-565ARH are most crit-
ical for high speed performance. Output capacitance of the
DAC is only 20pF, so a small change of additional capacitance
may alter the op amp’s stability and affect settling time. Con-
nections to pin 9 should be short and few. Component leads
should be short on the side connecting to pin 9 (as for feed-
back capacitor C). See the Settling Time section.
Bypass Capacitors
Power supply bypass capacitors on the op amp will serve the
HS-565ARH also. If no op amp is used, a 0.01µF ceramic
capacitor from each supply terminal to pin 12 is sufficient,
since supply current variations are small.
Die Characteristics
Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200
Die Size . . . . . . . . . . . . . . . . . . . . . . . . . 179 mils x 107 mils
Tie Substrate to . . . . . . . . . . . . . . . . . . . .Reference Ground
Process. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bipolar - DI
Spec Number 518795
9
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