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MT6225ACS 데이터 시트보기 (PDF) - Unspecified

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MT6225ACS
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MT6225ACS Datasheet PDF : 377 Pages
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MT6225 GSM/GPRS Baseband Processor Data Sheet Revision 1.00
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MIXED+0F04h Reserved 7 Analog Circuit Control Register 1
RES7_AC_CON1
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Type R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
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12.3 Programming Guide
12.3.1 BBRX Register Setup
The register used to control analog base-band receiver is BBRX_AC_CON.
12.3.1.1 Programmable Biasing Current
To maximize the yield in modern digital process, the receiver features providing 5-bit 32-level programmable current to
bias internal analog blocks. The 5-bits registers CALBIAS [4:0] is coded with 2’s complement format.
12.3.1.2 Offset / Gain Calibration
The base-band downlink receiver (RX), together with the base-band uplink transmitter (TX) introduced in the next section,
provides necessary analog hardware for DSP algorithm to correct the mismatch and offset error. The connection for
measurement of both RX/TX mismatch and gain error is shown in Figure 106, and the corresponding calibration procedure
is described below.
Figure 106 Base-band A/D and D/A Offset and Gain Calibration
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MediaTek Inc. Confidential

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