EP1C12T173C6 데이터 시트보기 (PDF) - Altera Corporation
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EP1C12T173C6 Datasheet PDF : 104 Pages
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Cyclone Device Handbook, Volume 1
Table 4–40. Cyclone I/O Standard Column Pin Input Delay Adders (Part 2 of 2)
I/O Standard
SSTL-2 class II
LVDS
-6 Speed Grade
Min
Max
−278
−261
-7 Speed Grade
Min
Max
−320
−301
-8 Speed Grade
Unit
Min
Max
−362
ps
−340
ps
Table 4–41. Cyclone I/O Standard Row Pin Input Delay Adders
I/O Standard
LVCMOS
3.3-V LVTTL
2.5-V LVTTL
1.8-V LVTTL
1.5-V LVTTL
3.3-V PCI (1)
SSTL-3 class I
SSTL-3 class II
SSTL-2 class I
SSTL-2 class II
LVDS
-6 Speed Grade
Min
Max
0
0
27
182
278
0
−250
−250
−278
−278
−261
-7 Speed Grade
Min
Max
0
0
31
209
319
0
−288
−288
−320
−320
−301
-8 Speed Grade
Unit
Min
Max
0
ps
0
ps
35
ps
236
ps
361
ps
0
ps
−325
ps
−325
ps
−362
ps
−362
ps
−340
ps
Table 4–42. Cyclone I/O Standard Output Delay Adders for Fast Slew Rate on Column Pins (Part 1 of 2)
Standard
LVCMOS
3.3-V LVTTL
2 mA
4 mA
8 mA
12 mA
4 mA
8 mA
12 mA
16 mA
24 mA
-6 Speed Grade
Min
Max
0
−489
−855
−993
0
−347
−858
−819
−993
-7 Speed Grade
Min
Max
0
−563
−984
−1,142
0
−400
−987
−942
−1,142
-8 Speed Grade
Unit
Min
Max
0
ps
−636
ps
−1,112
ps
−1,291
ps
0
ps
−452
ps
−1,116
ps
−1,065
ps
−1,291
ps
4–22
Preliminary
Altera Corporation
January 2007
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