Integrated Device Technology
ADC1002S020
Single 10 bits ADC, up to 20 MHz
4. Quick reference data
Table 1. Quick reference data
VDDA = V7 to V9 = 3.3 V; VDDD = V4 to V3 = V18 to V19 = 3.3 V; VDDO = V20 to V21 = 3.3 V; VSSA,
VSSD and VSSO shorted together; Vi(p-p) = 1.83 V; CL = 20 pF; Tamb = 0 C to 70 C; typical values
measured at Tamb = 25 C unless otherwise specified.
Symbol Parameter
Conditions
Min Typ Max Unit
VDDA
VDDD1
VDDD2
VDDO
IDDA
analog supply voltage
digital supply voltage 1
digital supply voltage 2
output supply voltage
analog supply current
3.0
3.3
5.25 V
3.0
3.3
5.25 V
3.0
3.3
5.25 V
3.0
3.3
5.25 V
-
7.5
10
mA
IDDD
IDDO
INL
digital supply current
output supply current
integral non-linearity
-
fclk = 20 MHz;
-
ramp input;
CL = 20 pF
ramp input; see
-
Figure 6
7.5
10
mA
1
2
mA
1
2
LSB
DNL
differential non-linearity
ramp input; see
-
Figure 7
0.25 0.7 LSB
fclk(max)
Ptot
maximum clock frequency
total power dissipation
operating;
VDDD = 3.3 V
standby mode
20
-
-
MHz
-
53
73
mW
-
4
-
mW
5. Ordering information
Table 2. Ordering information
Type number
Package
Name
ADC1002S020HL
LQFP32
Description
plastic low profile quad flat package; 32 leads; body 5 5 1.4 mm
Version
SOT401-1
ADC1002S020_3
Product data sheet
Rev. 03 — 2 July 2012
© IDT 2012. All rights reserved.
2 of 18