PCI Buffers
The PCI buffers are based on the 3.3V PCI standard where Inputs are required to be clamped to
both ground and VCCB (3.3V) rails. To be also Cold Sparing these buffers are:
• Cold sparing when VCCB=0V (clamped to VSSB only)
• clamped to VCCB and VSSB when VCCB=3.3V
The PCI family includes 3 buffer types:
• PP33B01Z : Bidirectional
• PP33T01Z : 3-state Output
• PP33O01Z : Output only
The PCI drive strength is almost equivalent to the standard IO33 Drive 08. The main differences
are:
• the non tolerance
• the input trigger levels which are slightly lower (VIH min = 2V)
LVDS Buffers
The LVDS family is based on the ANSI/TIA/EIA-644 Standard. It is composed of:
• a Voltage /Current Reference (PL33REFZ).
• a transmitter buffer (PL33TXZ) with Outp and Outn differential outputs.
• a receiver buffer (PL33RXZ) with Inp and Inn differential inputs.
The 3 pads are Cold Sparing (high impedance when VCCB=0V) but they are tolerant only when
they are disabled (ien = “1” or oen = “1”).
The LVDS standard transmission levels are +/- 350mV differential around 1.25V common mode.
As these levels are tight to achieve in military temperature range the PL33REFZ pad provides 2
references to the other LVDS pads of the same cluster:
• the external Ref voltage which is used by transmitter only to force the common mode
voltage (Vref)
• a current reference which is used by both transmitter and receiver (Iref).
The LVDS Tx takes the place of three standard I/O pads and the LVDS Rx takes the room of
two.
LVPECL Buffer
The PE33RXZ PECL buffer is a simplified version of PL33RXZ LVDS buffer. It is a differential
input with LVPECL levels and it does not need Ref. So it can be implemented inside a standard
IO33 cluster.
The PECL RX occupies two standard I/O places.
Power “On/Off”
Sequence
In a multiple Power Supplies application the discrepancy between various supply rise/fall times
may induce high currents through the ESD protection clamping diodes during Power on/off
sequences.
4 ATC18RHA
4261B–AERO–06/05