ATC18RHA(2005) 데이터 시트보기 (PDF) - Atmel Corporation

부품명

상세내역

제조사

ATC18RHA
(Rev.:2005)

Rad. Hard 0.18 µm CMOS Cell-based ASIC for Space Use

Atmel Corporation 

ATC18RHA

PLL

Core

Core Array

Standard cell library

The typical case is when an external signal is applied on an input with Vih > VCCB + 400mV.

The input current is mainly limited by the external signal generator impedance.

If many inputs are in that configuration the resulting current may damage the circuit.

Tolerant inputs are not clamped to VCCB (ATC18RHA standard IO33 family) so this potential

problem is present only on non tolerant inputs which is the case for:

• IO18 pads family

• IO33 specific pads (PCI,LVDS,LVPECL)

In fact for all these pads when VCC is off (whatever VCCB state) the clamping diodes present on

inputs are disconnected (inputs are turned to tolerant mode).

So when all the ATC18RHA circuit must be powered on/off while other circuits in the application

are still powered on, the recommended sequences are:

• power-up: VCCB on -> VCC(vdd!) on

• power-down: VCC(vdd!) off -> VCCB off

It is also recommended to stop all activity during these phases as I/O could be in an undeter-

mined state (Input or Output) and create bus contention.

If the ATC18RHA circuit must be partially activated (some clusters on while the others are off)

two cases must be considered:

• all the circuit is powered on/off while a particular cluster is always off : as all pads are Cold

Sparing there is no problem

• a particular cluster must be power on/off while the rest of the circuit is still on. For tolerant input

there is no problem but for not tolerant inputs (IO18, PCI) the Hot Swap mode must be used (see

Power Control pads in clusters). For LVDS family and LVPECL the disable mode is enough to

disconnect input clamping diodes (ien,oen=”1”).

If two ATC18RHA circuits are in parallel (spare configuration) with one circuit powered on/off

while the other is always off there is no problem as all pads are Cold Sparing.

The PLL includes the Loop Filter so the block only needs a specific VCCPLL,VSSPLL 1.8V sup-

ply pair.

All the cells of the ATC18RHA library are a multiple of a site, each site being 0.56µm width and

5.6µm height. For example, a NAND2 cell will be need 6 sites resulting in a cell size of 3.36µm x

5.6µm or 18.816µm².

The Atmel Standard Cell Library, SClib, contains a comprehensive set of a combination of logic

and storage cells. The SClib library includes cells that belong to the following categories:

• Buffers and Gates

• Multiplexers

• Standard and SEU Hardened Flip-flops

• Standard and SEU Hardened Scan Flip-flops

• Latches

• Adders and Subtractors

5

4261B–AERO–06/05

Share Link: