83940AY-02LFT 데이터 시트보기 (PDF) - Integrated Device Technology
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83940AY-02LFT
Integrated Device Technology
83940AY-02LFT Datasheet PDF : 15 Pages
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ICS83940-02
LOW SKEW, 1-TO-18
DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER
GENERAL DESCRIPTION
The ICS83940-02 is a low skew, 1-to-18 Fanout Buffer . The
83940-02 has two selectable clock inputs. The CLK0,
nCLK0 pair can accept most standard differential input
levels. The single ended clock input accepts LVCMOS or
LVTTL input levels. The low impedance LVCMOS/LVTTL
outputs are designed to drive 50Ω series or parallel
terminated transmission lines. The effective fanout can be
increased from 18 to 36 by utilizing the ability of the
outputs to drive two series terminated lines.
The ICS83940-02 is characterized at full 3.3V, full 2.5V and
mixed 3.3V input and 2.5V output operating supply modes.
Guaranteed output and part-to-part skew characteristics
make the ICS83940 ideal for those clock distribution
applications demanding well defined performance and
repeatability.
FEATURES
• 18 LVCMOS/LVTTL outputs, 7Ω typical output impedance
• Selectable LVCMOS_Clock or CLK0, nCLK0 input pair
• LVCMOS_CLK supports the following input types:
LVCMOS or LVTTL
• CLK0, nCLK0 pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
• Maximum output frequency: 200MHz
• Output skew: 120ps (maximum)
• Part-to-part skew: 850ps (maximum)
• Output supply modes:
Core/Output
3.3V/3.3V
3.3V/2.5V
2.5V/2.5V
• 0°C to 70°C ambient operating temperature
• Industrial temperature information available upon request
BLOCK DIAGRAM
CLK_SEL
CLK0
nCLK0
0
LVCMOS_CLK
1
83940AY-02
PIN ASSIGNMENT
Q0:Q17
GND
GND
LVCMOS_CLK
CLK_SEL
CLK
nCLK
VDD
VDDO
32 31 30 29 28 27 26 25
1
24
2
23
3
22
4 ICS83940-02 21
5
20
6
19
7
18
8
17
9 10 11 12 13 14 15 16
Q6
Q7
Q8
VDDO
Q9
Q10
Q11
GND
32-Lead LQFP
Y Pacakge
7mm x 7mm x 1.4mm package body
Top View
www.idt.com
1
REV. A AUGUST 4, 2010
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