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ICS8344AYI0IL

LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER

Integrated Device Technology 

ICS8344I-01

LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER

PRELIMINARY

TABLE 3A. OUTPUT ENABLE FUNCTION TABLE

Banks 1, 2, 3

Inputs

Outputs

OE

CLK_EN

Q0-Q23

0

X

Hi-Z

1

0

Disabled in logic LOW state. NOTE 1

1

1

Enabled. NOTE 1

NOTE 1: The clock enable and disable function is synchronous to the falling

edge of the selected reference clock.

TABLE 3B. CLOCK SELECT FUNCTION TABLE

Control Input

CLK_SEL

0

1

CLK0, nCLK0

Selected

De-selected

Clock

CLK1, nCLK1

De-selected

Selected

TABLE 3C. CLOCK INPUT FUNCTION TABLE

Inputs

Outputs

Input to Output Mode

OE

CLK0, CLK1

nCLK0, nCLK1 Q0 thru Q23

Polarity

1

0

1

LOW

Differential to Single Ended

Non Inverting

1

1

0

HIGH

Differential to Single Ended

Non Inverting

1

0

Biased; NOTE 1

LOW

Single Ended to Differential

Non Inverting

1

1

Biased; NOTE 1

HIGH

Single Ended to Differential

Non Inverting

1

Biased; NOTE 1

0

HIGH

Single Ended to Differential

Inverting

1

Biased; NOTE 1

1

LOW

Single Ended to Differential

Inverting

NOTE 1: Please refer to the Application Information section on page 8, Figure 1, which discusses Wiring the Differential

Input to Accept Single-Ended Levels.

IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER

3

ICS8344AYI-01 REV. B MAY 10, 2007

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