MAX1708 데이터 시트보기 (PDF) - Maxim Integrated

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MAX1708

High-Frequency, High-Power, Low-Noise, Step-Up DC-DC Converter

Maxim Integrated 

High-Frequency, High-Power, Low-Noise,

Step-Up DC-DC Converter

PIN

1

2

3, 4, 5

6, 9

7

8

10

11

12, 13, 14

15

16

NAME

ONB

ONA

LX

GND

SS/LIM

REF

OUT

FB

PGND

3.3/5

CLK

Pin Description

FUNCTION

Shutdown Input. When ONB = high and ONA = low, the device turns off (Table 1).

On-Control Input. When ONA = high or ONB = low, the device turns on (Table 1).

Drain of N-Channel Power Switch. Connect pins 3, 4, and 5 together with wide traces. Connect

an external Schottky diode from LX to VOUT. (Figure 1)

Ground

Soft-Start and/or Current-Limit Input. Connect a capacitor from SS/LIM to GND to control the

rate at which the device reaches current limit (soft-start). To reduce the current limit from the

preset values, connect a resistor from SS/LIM to GND (see Design Procedure). During

shutdown, SS/LIM is internally pulled to GND to discharge the soft-start capacitor.

Voltage Reference Output. Bypass with a 0.22µF capacitor to GND. Maximum REF load is

50µA.

Output Voltage Sense Input. The device is powered from OUT. Bypass with a 0.1µF capacitor

to PGND with less than 5mm trace length. Connect a 2Ω series resistor from the output filter

capacitor (0.1µF) to OUT (Figure 1).

DC-DC Converter Feedback Input. Connect FB to GND for internally set output voltage (see

3.3/5 pin description). Connect a resistor-divider from the output to set the output voltage in the

+2.5V to +5.5V range. FB regulates to +1.24V (Figure 4).

Power Ground, Source of N-Channel Power MOSFET Switch. Connect pins 12, 13, and 14

together with wide traces.

Output Voltage Selection Input. When FB is connected to GND, the regulator uses internal

feedback to set the output voltage. 3.3/5 = low sets output to 3.3V; 3.3/5 = high sets output to

5V. If an external divider is used at FB, connect 3.3/5 to ground.

Clock Input for the DC-DC Converter. Connect to OUT for internal oscillator. Drive CLK with

an external clock for external synchronization.

8 _______________________________________________________________________________________

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