HD64336086 데이터 시트보기 (PDF) - Renesas Electronics

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HD64336086

16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

Renesas Electronics 

Item

Section 13 Timer Z

13.3.2 Timer Mode

Register (TMDR)

Page Revision (See Manual for Details)

181

Bit Bit Name Description

0 SYNC

Timer Synchronization

0: TCNT_1 and TCNT_0 operate as a different

timer

1: TCNT_1 and TCNT_0 are synchronized

TCNT_1 and TCNT_0 can be pre-set or

cleared synchronously

13.4.4 Synchronous

Operation

208 Figure 13.20 shows an example of synchronous operation. In

this example, synchronous operation has been selected,

FTIOB0 and FTIOB1 have been designated for PWM mode,

GRA_0 compare match has been set as the channel 0

counter clearing source, and synchronous clearing has been

set for the channel 1 counter clearing source. In addition, the

same input clock has been set as the counter input clock for

channel 0 and channel 1. Two-phase PWM waveforms are

output from pins FTIOB0 and FTIOB1.

13.4.9 Timer Z Output

237

Timing

T1

T2

Figure 13.44 Example of

Output Disable Timing of

Timer Z by Writing to

TOER

φ

Address bus

TOER address

Timer Z

output pin

Timer output

I/O port

Timer Z output

I/O port

Figure 13.45 Example of 237

φ

Output Disable Timing of

Timer Z by External Trigger

TOER

N

H'FF

Section 14 Watchdog

252

Timer

14.2.1 Timer Control/Status

Register WD (TCSRWD)

Timer Z

output pin

Timer Z output

Timer Z output

I/O port

I/O port

Bit Bit Name Description

4 TCSRWE Timer Control/Status Register WD Write Enable

Rev. 2.00 Sep. 23, 2005 Page 466 of 354

REJ09B0160-0200

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