AD8123 데이터 시트보기 (PDF) - Analog Devices

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AD8123

Triple Differential Receiver with Adjustable Line Equalization

Analog Devices 

Data Sheet

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter

Supply Voltage

Power Dissipation

Input Voltage (Any Input)

Storage Temperature Range

Operating Temperature Range

Lead Temperature (Soldering, 10 sec)

Junction Temperature

Rating

11 V

See Figure 3

VS− − 0.3 V to VS+ + 0.3 V

−65°C to +125°C

−40°C to +85°C

300°C

150°C

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, θJA is

specified for the device soldered in a circuit board in still air.

Table 3. Thermal Resistance with the Underside Pad

Connected to the Plane

Package Type/PCB Type

θJA

Unit

40-Lead LFCSP/4-Layer

29

°C/W

Maximum Power Dissipation

The maximum safe power dissipation in the AD8123 package

is limited by the associated rise in junction temperature (TJ) on

the die. At approximately 150°C, which is the glass transition

temperature, the plastic changes its properties. Even temporarily

exceeding this temperature limit can change the stresses that the

package exerts on the die, permanently shifting the parametric

performance of the AD8123. Exceeding a junction temperature

of 175°C for an extended time can result in changes in the

silicon devices, potentially causing failure.

AD8123

The power dissipated in the package (PD) is the sum of the

quiescent power dissipation and the power dissipated in the

package due to the load drive for all outputs. The quiescent

power is the voltage between the supply pins (VS) times the

quiescent current (IS). The power dissipation due to each load

current is calculated by multiplying the load current by the

voltage difference between the associated power supply and the

output voltage. The total power dissipation due to load currents

is then obtained by taking the sum of the individual power

dissipations. RMS output voltages must be used when dealing

with ac signals.

Airflow reduces θJA. In addition, more metal directly in contact

with the package leads from metal traces, through holes, ground,

and power planes reduces the θJA. The exposed paddle on the

underside of the package must be soldered to a pad on the PCB

surface that is thermally connected to a solid plane (usually the

ground plane) to achieve the specified θJA.

Figure 3 shows the maximum safe power dissipation in the

package vs. the ambient temperature for the 40-lead LFCSP

(29°C/W) on a JEDEC standard 4-layer board with the underside

paddle soldered to a pad that is thermally connected to a PCB

plane. θJA values are approximations.

7

6

5

4

3

2

1

0

–40

–20

0

20

40

60

80

AMBIENT TEMPERATURE (°C)

Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board

ESD CAUTION

Rev. B | Page 5 of 16

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