AD5425YRM 데이터 시트보기 (PDF) - Analog Devices
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AD5425YRM Datasheet PDF : 28 Pages
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0.5
TA = 25°C
VDD = 3V
VREF = 0V
0.3
MAX INL
0.1
MAX DNL
–0.1
MIN INL
–0.3
MIN DNL
–0.5
0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5
VBIAS (V)
Figure 10. Linearity vs. VBIAS Voltage Applied to IOUT2
1.4
TA = 25°C
1.2
VDD = 3V
VREF = 0V
1.0
0.8
GAIN ERROR
0.6
0.4
OFFSET ERROR
0.2
0
–0.2
–0.4
0.5
1.0
1.5
VBIAS (V)
Figure 11. Gain and Offset Errors vs. VBIAS Voltage Applied to IOUT2
0.5
VDD = 5V
VREF = 0V
0.3
MAX INL
0.1
MAX DNL
–0.1
MIN DNL
–0.3
MIN INL
–0.5
0.5
1.0
1.5
2.0
2.5
VBIAS (V)
Figure 12. Linearity vs. VBIAS Voltage Applied to IOUT2
AD5425
2.5
VDD = 5V
VREF = 0V
2.0
1.5
GAIN ERROR
1.0
0.5
OFFSET ERROR
0
–0.5
0.5
1.0
1.5
2.0
2.5
VBIAS (V)
Figure 13. Gain and Offset Errors vs. Voltage Applied to IOUT2
10.0
TA = 25°C
VDD = 5V
8.0 VREF = 2.5V
6.0
4.0
2.0
OFFSET ERROR
0
–2.0
–4.0
0
GAIN ERROR
0.5
1.0
1.5
2.0
2.5
VBIAS (V)
Figure 14. Gain and Offset Errors vs. VBIAS Voltage Applied to IOUT2
1.0
TA = 25°C
0.8 VDD = 5V
VREF = 2.5V
0.6
0.4
0.2
MAX INL BIAS
MIN INL BIAS
0
–0.2
MAX DNL BIAS
–0.4
MIN DNL BIAS
–0.6
–0.8
–1.0
0
0.5
1.0
1.5
2.0
VBIAS (V)
Figure 15. Linearity vs. VBIAS Voltage Applied to IOUT2
Rev. A | Page 9 of 28
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