Industrial Version
PLCC DC Electrical Characteristics (Note 6)
VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −40°C to +85°C
Symbol
Parameter
TC = −40°C
Min
Max
TC = 0°C to +85°C
Min
Max
Units
Conditions
VOH
VOL
VOHC
VOLC
VIH
Output HIGH Voltage
Output LOW Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
−1085
−1830
−1095
−1170
−870
−1575
−1565
−870
−1025
−1830
−1035
−1165
−870
−1620
−1610
−870
mV
VIN = VIH (Max)
Loading with
mV
or VIL (Min)
50Ω to −2.0V
mV
VIN = VIH (Min)
Loading with
mV or VIL (Max)
50Ω to −2.0V
mV Guaranteed HIGH Signal
for ALL Inputs
VIL
Input LOW Voltage
−1830 −1480 1830
1475
mV Guaranteed LOW Signal
for ALL Inputs
IIL
Input LOW Current
IIH
Input HIGH Current
S0, S1
E1, E2
Dna–Dnd
MR
0.50
0.50
300
220
350
350
340
340
430
430
µA
VIN = VIL (Min)
µA
VIN = VIH (Max)
IEE
Power Supply Current
−87
−40
−87
−40
mA Inputs Open
Note 6: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guard banding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under “worst case” conditions.
PLCC AC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND
Symbol
Parameter
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tTLH
tTHL
tS
tH
tPW (L)
tPW (H)
Propagation Delay
Dna–Dnd to Output
(Transparent Mode)
Propagation Delay
S0, S1 to Output
(Transparent Mode)
Propagation Delay
E1, E2 to Output
Propagation Delay
MR to Output
Transition Time
20% to 80%, 80% to 20%
Setup Time
Dna–Dnd
S0, S1
MR (Release Time)
Hold Time
Dna–Dnd
S0, S1
Pulse Width LOW E1, E2
Pulse Width HIGH MR
TC = −40°C
Min
Max
0.60
1.70
1.00
2.40
0.80
0.80
0.40
1.80
2.10
1.90
0.90
2.40
1.50
0.40
0.00
2.00
2.00
TC = +25°C
Min
Max
0.60
1.70
1.00
2.40
0.80
0.80
0.60
1.80
2.10
1.30
0.80
1.60
1.40
0.30
−0.10
2.00
2.00
TC = +85°C
Min
Max
0.70
1.80
1.20
2.50
0.80
0.80
0.60
1.90
2.10
1.30
0.80
1.60
1.40
0.30
−0.10
2.00
2.00
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions
Figures 1, 2
Figures 1, 3
Figures 1, 2
Figure 4
Figure 3
Figure 4
Figure 2
Figure 3
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