74AC74SJ 데이터 시트보기 (PDF) - Fairchild Semiconductor

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74AC74SJ

Dual D-Type Positive Edge-Triggered Flip-Flop

Fairchild Semiconductor 

Connection Diagram

Logic Symbols

Pin Descriptions

Pin Names

D1, D2

CP1, CP2

CD1, CD2

SD1, SD2

Q1, Q1, Q2, Q2

Description

Data Inputs

Clock Pulse Inputs

Direct Clear Inputs

Direct Set Inputs

Outputs

IEEE/IEC

Truth Table

(Each Half)

Inputs

Outputs

SD CD CP D

Q

Q

L

H

XXH

L

H

L

XXL

H

L

L

XXH

H

H

 H

HH

L

H

 H

L

L

H

H

H

H HIGH Voltage Level

L LOW Voltage Level

X Immaterial

LOW-to-HIGH Clock Transition

Q0 (Q0) Previous Q (Q) before LOW-to-HIGH Transition of Clock

L

X Q0 Q0

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