Philips Semiconductors
16-bit edge triggered D-type flip-flop; 3.6 V tolerant;
3-state
Product Specification
74AVC16374
FEATURES
• Wide supply voltage range from 1.2 to 3.6 V
• Complies with JEDEC standard no. 8-1A/5/7
• CMOS low power consumption
• Input/output tolerant up to 3.6 V
• DCO (Dynamic Controlled Output) circuit dynamically
changes output impedance, resulting in noise reduction
without speed degradation
• Low inductance multiple VCC and GND pins to minimize
noise and ground bounce
• Supports Live Insertion.
DESCRIPTION
The 74AVC16374 is a 16-bit edge triggered flip-flop
featuring separate D-type inputs for each flip-flop and
3-state outputs for bus oriented applications.
The 74AVC16374 consist of 2 sections of eight edge
triggered flip-flops. A clock input (CP) and an output
enable (OE) are provided per 8-bit section.
The 74AVC16374 is designed to have an extremely fast
propagation delay and a minimum amount of power
consumption.
To ensure the high-impedance output state during
power-up or power-down, nOE should be tied to VCC
through a pull-up resistor (Live Insertion).
A Dynamic Controlled Output (DCO) circuitry is
implemented to support termination line drive during
transient (see Figs 1 and 2).
handbook, h0alfpage
I OH
(mA)
1.8 V
−100
MNA506
2.5 V
−200
3.3 V
−300
0
1
2
3
4
VOH (V)
Fig.1 Output voltage as a function of the
HIGH-level output current.
300
handbook, halfpage
IOL
(mA)
200
3.3 V
2.5 V
100
1.8 V
MNA507
0
0
1
2
3
4
VOL (V)
Fig.2 Output voltage as a function of the
LOW-level output current.
2000 Mar 09
2