Philips Semiconductors
16-bit even/odd parity generator/checker
TEST CIRCUIT AND WAVEFORMS
Product specification
74HC/HCT7080
CL = load capacitance including jig and
probe capacitance
(see AC CHARACTERISTICS for values).
RT = termination resistance should be equal to the output
impedance ZO of the pulse generator.
FAMILY
74HC
74HCT
AMPLITUDE VM
VCC
3.0 V
50%
1.3 V
tr; tf
fmax; PULSE WIDTH
< 2 ns
< 2 ns
OTHER
6 ns
6 ns
Fig.8 Test circuit for measuring AC performance.
CL = load capacitance including jig and
probe capacitance
(see AC CHARACTERISTICS for values).
RT = termination resistance should be equal to the output
impedance ZO of the pulse generator.
FAMILY
74HC
74HCT
AMPLITUDE VM
VCC
3.0 V
50%
1.3 V
tr; tf
fmax; PULSE WIDTH
< 2 ns
< 2 ns
OTHER
6 ns
6 ns
Fig.9 Input pulse definitions.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
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