A67L06181E-10.0 데이터 시트보기 (PDF) - AMIC Technology

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A67L06181E-10.0

1M X 18, 512K X 36 LVTTL, Flow-through ZeBL™ SRAM

AMIC Technology 

A67L06181/A67L93361

READ/WRITE Timing

1

2 tKHKH 3

4

5

6

7

8

9

10

CLK

tEVK

H

CEN

tCVKH

CE

tKHE

X

tKHKL

tKHCX

tKLKH

ADV/

LD

R/W

BWx

ADDRESS

A1

A2

tAVKH

tKHAX

tDVKH

tKHDX

I/O

D(A1)

D(A2)

OE

COMMAND

WRITE

D(A1)

WRITE

D(A2)

BURST

WRITE

D(A2+1)

A3

tKHQV

tKHQX1

D(A2+1)

A4

tKHQX

Q(A3)

tGLQV

Q(A4)

tGHQZ

A5

A6

A7

Q(A4+1)

tKHQZ

D(A5)

tKHQX

tGLQX

Q(A6)

D(A7)

READ

Q(A3)

READ

Q(A4)

BURST

READ

Q(A4+1)

WRITE

D(A5)

READ

Q(A6)

: Don't Care

WRITE

D(A7)

DESELECT

: Undefined

Note : 1. For this waveform, ZZ is tied LOW.

2. Burst sequence order is determined by MODE (0 = linear, 1 = interleaved). BRST operations are optional.

3. CE represents three signals. When CE = 0, it represents CE = 0, CE2 = 0, CE2 = 1.

4. Data coherency is provided for all possible operations. If a READ is initiated the most current data is used. The

most recent data may be from the input data register.

PRELIMINARY (August, 2005, Version 0.0)

15

AMIC Technology, Corp.

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