AD1833 데이터 시트보기 (PDF) - Analog Devices
부품명
상세내역
제조사
AD1833 Datasheet PDF : 20 Pages
| |||
AD1833
Address
15–12
0001
Reserved*
11
10
0
0
*Must be programmed to zero.
Table VIII. DAC Control II
Reserved*
9–6
5
0
Channel 6
0 = Mute Off
1 = Mute On
Function
Mute Control
4
3
2
Channel 5 Channel 4 Channel 3
0 = Mute Off 0 = Mute Off 0 = Mute Off
1 = Mute On 1 = Mute On 1 = Mute On
1
0
Channel 2 Channel 1
0 = Mute Off 0 = Mute Off
1 = Mute On 1 = Mute On
DAC CONTROL REGISTER II
DAC Control Register II contains individual channel mute
controls for each of the 6 DACs. Default operation (bit = 0) is
muting off. Bits 9 through 6 of Control Register II are reserved
and should be programmed to zero, see Table VIII.
Table IX. Muting Control
Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
XXXXX1
XXXX1
X
XXX1
XX
XX1
XXX
X1
XXXX
1
XXXXX
Muting
Mute Channel 1
Mute Channel 2
Mute Channel 3
Mute Channel 4
Mute Channel 5
Mute Channel 6
DAC CONTROL REGISTER III
Stereo Replicate
The AD1833 allows the stereo information on Channel 1
(SDIN1—Left 1 and Right 1) to be copied to Channels 2 and 3
(Left/Right 2 and Left/Right 3). These signals can be used in an
external summing amplifier to increase potential signal SNR.
Stereo Replicate mode can be enabled by writing to Control
Bit 5, see Table XI. Note that replication is not reflected in
the zero flag status.
Bit 5
0
1
Table XI. Stereo Replicate
Stereo Mode
Normal
Channel 1 Data Replicated on Channels 2 and 3
Address
15–12
1000
Reserved*
11
10
0
0
*Must be programmed to zero.
Reserved*
9–6
0
Table X. DAC Control III
Stereo Replicate
(192 kHz)
5
0 = Normal
1 = Replicate
Function
MCLK Select
4–3
00 = 256 × fS (MCLK × 2)
01 = 512 × fS (MCLK
Straight Through)
10 = 768 × fS (MCLK × 2/3)
Zero Detect
2
0 = Active High
1 = Active Low
Reserved
1–0
–10–
REV. 0
Share Link: 