AD7147
DETAILED REGISTER DESCRIPTIONS
BANK 1 REGISTERS
All addresses and default values are expressed in hexadecimal.
Table 20. PWR_CONTROL Register
Address Data Bit
Default
Value
0x000 [1:0]
0
[3:2]
0
[7:4]
0
[9:8]
0
[10]
0
[11]
0
[12]
0
[13]
0
[15:14]
0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Name
POWER_MODE
LP_CONV_DELAY
SEQUENCE_STAGE_NUM
DECIMATION
SW_RESET
INT_POL
EXT_SOURCE
Unused
CDC_BIAS
Description
Operating modes
00 = full power mode (normal operation, CDC
conversions approximately every 36 ms)
01 = full shutdown mode (no CDC conversions)
10 = low power mode (automatic wake-up operation)
11 = full shutdown mode (no CDC conversions)
Low power mode conversion delay
00 = 200 ms
01 = 400 ms
10 = 600 ms
11 = 800 ms
Number of stages in sequence (N + 1)
0000 = 1 conversion stage in sequence
0001 = 2 conversion stages in sequence
……
Maximum value = 1011 = 12 conversion stages per
sequence
ADC decimation factor
00 = decimate by 256
01 = decimate by 128
10 = decimate by 64
11 = decimate by 64
Software reset control (self-clearing)
1 = resets all registers to default values
Interrupt polarity control
0 = active low
1 = active high
Excitation source control
0 = enable excitation source to CINx pins
1 = disable excitation source to CINx pins
Set to 0
CDC bias current control
00 = normal operation
01 = normal operation + 20%
10 = normal operation + 35%
11 = normal operation + 50%
Rev. 0 | Page 41 of 68