AD8039AR-REEL 데이터 시트보기 (PDF) - Analog Devices
부품명
상세내역
제조사
AD8039AR-REEL Datasheet PDF : 12 Pages
| |||
OUTLINE DIMENSIONS
AD8038/AD8039
8-Lead Standard Small Outline Package [SOIC]
(R-8)
Dimensions shown in millimeters and (inches)
5.00 (0.1968)
4.80 (0.1890)
8
4.00 (0.1574)
3.80 (0.1497) 1
5
6.20 (0.2440)
4 5.80 (0.2284)
0.25 (0.0098)
1.27 (0.0500)
BSC
1.75 (0.0688)
1.35 (0.0532)
0.50 (0.0196)
0.25 (0.0099) ؋ 45؇
0.10 (0.0040)
COPLANARITY
0.10
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
8؇
0.25 (0.0098) 0؇ 1.27 (0.0500)
0.17 (0.0067) 0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
8-Lead Small Outline Transistor Package [SOT-23]
(RT-8)
Dimensions shown in millimeters
2.90 BSC
8765
1.60 BSC
2.80 BSC
1 234
PIN 1
INDICATOR
1.30
1.15
0.90
1.95
BSC
0.65 BSC
1.45 MAX 0.22
0.08
0.60
0.15 MAX
0.38
0.22
SEATING
PLANE
8؇
4؇
0؇
0.45
0.30
COMPLIANT TO JEDEC STANDARDS MO-178BA
5-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-5)
Dimensions shown in millimeters
2.00 BSC
5
1.25 BSC
4
2.10 BSC
1
2
3
PIN 1
1.00
0.65 BSC
0.90
1.10 MAX
0.70
0.22
0.08
0.46
0.10 MAX
0.30
0.36
0.15
SEATING
0.26
PLANE
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203AA
REV. F
–11–
Share Link: 