AD9516-1/PCBZ(Rev0) 데이터 시트보기 (PDF) - Analog Devices

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AD9516-1/PCBZ
(Rev.:Rev0)

14-Output Clock Generator with Integrated 2.5 GHz VCO

Analog Devices 

AD9516-1

Parameter

Delay Variation with Temperature

Short Delay Range5

Zero Scale

Full Scale

Long Delay Range5

Zero Scale

Full Scale

Min Typ Max Unit Test Conditions/Comments

0.23

−0.02

0.3

0.24

ps/°C

ps/°C

ps/°C

ps/°C

1 This is the difference between any two similar delay paths while operating at the same voltage and temperature.

2 Corresponding CMOS drivers set to A for noninverting and B for inverting.

3 The maximum delay that can be used is a little less than one-half the period of the clock. A longer delay disables the output.

4 Incremental delay; does not include propagation delay.

5 All delays between zero scale and full scale can be estimated by linear interpolation.

CLOCK OUTPUT ADDITIVE PHASE NOISE (DISTRIBUTION ONLY; VCO DIVIDER NOT USED)

Table 6.

Parameter

CLK-TO-LVPECL ADDITIVE PHASE NOISE

CLK = 1 GHz, OUTPUT = 1 GHz

Divider = 1

@ 10 Hz Offset

@ 100 Hz Offset

@ 1 kHz Offset

@ 10 kHz Offset

@ 100 kHz Offset

@ 1 MHz Offset

@ 10 MHz Offset

@ 100 MHz Offset

CLK = 1 GHz, OUTPUT = 200 MHz

Divider = 5

@ 10 Hz Offset

@ 100 Hz Offset

@ 1 kHz Offset

@ 10 kHz Offset

@ 100 kHz Offset

@ 1 MHz Offset

>10 MHz Offset

CLK-TO-LVDS ADDITIVE PHASE NOISE

CLK = 1.6 GHz, OUTPUT = 800 MHz

Divider = 2

@ 10 Hz Offset

@ 100 Hz Offset

@ 1 kHz Offset

@ 10 kHz Offset

@ 100 kHz Offset

@ 1 MHz Offset

@ 10 MHz Offset

@ 100 MHz Offset

Min Typ Max Unit

−109

−118

−130

−139

−144

−146

−147

−149

−120

−126

−139

−150

−155

−157

−157

dBc/Hz

dBc/Hz

dBc/Hz

dBc/Hz

dBc/Hz

dBc/Hz

dBc/Hz

dBc/Hz

dBc/Hz

dBc/Hz

dBc/Hz

dBc/Hz

dBc/Hz

dBc/Hz

dBc/Hz

−103

−110

−120

−127

−133

−138

−147

−149

dBc/Hz

dBc/Hz

dBc/Hz

dBc/Hz

dBc/Hz

dBc/Hz

dBc/Hz

dBc/Hz

Test Conditions/Comments

Distribution section only; does not

include PLL and VCO

Input slew rate > 1 V/ns

Input slew rate > 1 V/ns

Distribution section only; does not

include PLL and VCO

Input slew rate > 1 V/ns

Rev. 0 | Page 8 of 84

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