AD9516-1/PCBZ PDF VIEW DOWNLOAD, AD9516-1/PCBZ 데이터시트

AD9516-1/PCBZ(Rev0) 데이터 시트보기 (PDF) - Analog Devices

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AD9516-1/PCBZ
(Rev.:Rev0)

14-Output Clock Generator with Integrated 2.5 GHz VCO

Analog Devices

AD9516-1/PCBZ Datasheet PDF : 84 Pages

1 2 3 4 5 6 7 8 9 10 Next Last

AD9516-1

Parameter

CLK = 1.6 GHz, OUTPUT = 400 MHz

Divider = 4

@ 10 Hz Offset

@ 100 Hz Offset

@ 1 kHz Offset

@ 10 kHz Offset

@ 100 kHz Offset

@ 1 MHz Offset

>10 MHz Offset

CLK-TO-CMOS ADDITIVE PHASE NOISE

CLK = 1 GHz, OUTPUT = 250 MHz

Divider = 4

@ 10 Hz Offset

@ 100 Hz Offset

@ 1 kHz Offset

@ 10 kHz Offset

@ 100 kHz Offset

@ 1 MHz Offset

>10 MHz Offset

CLK = 1 GHz, OUTPUT = 50 MHz

Divider = 20

@ 10 Hz Offset

@ 100 Hz Offset

@ 1 kHz Offset

@ 10 kHz Offset

@ 100 kHz Offset

@ 1 MHz Offset

>10 MHz Offset

Min Typ Max Unit

−114

−122

−132

−140

−146

−150

−155

dBc/Hz

−110

−120

−127

−136

−144

−147

−154

−124

−134

−142

−151

−157

−160

−163

dBc/Hz

Test Conditions/Comments

Input slew rate > 1 V/ns

Distribution section only; does not

include PLL and VCO

Input slew rate > 1 V/ns

CLOCK OUTPUT ABSOLUTE PHASE NOISE (INTERNAL VCO USED)

Table 7.

Parameter

LVPECL ABSOLUTE PHASE NOISE

VCO = 2.65 GHz; OUTPUT = 2.65 GHz

@ 1 kHz Offset

@ 10 kHz Offset

@ 100 kHz Offset

@ 1 MHz Offset

@ 10 MHz Offset

@ 40 MHz Offset

VCO = 2.475 GHz; OUTPUT = 2.475 GHz

@ 1 kHz Offset

@ 10 kHz Offset

@ 100 kHz Offset

@ 1 MHz Offset

@ 10 MHz Offset

@ 40 MHz Offset

Min Typ

Max Unit

−46

−76

−104

−123

−140

−146

−47

−77

−105

−124

−141

−146

dBc/Hz

Test Conditions/Comments

Internal VCO; direct to LVPECL output

Rev. 0 | Page 9 of 84

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