ADG726 데이터 시트보기 (PDF) - Analog Devices
부품명
상세내역
제조사
ADG726 Datasheet PDF : 12 Pages
| |||
ADG726/ADG732
VDD VSS
VDD VSS S1 50⍀
A4
S2
A0
S32
ADG732*
D
EN CS GND WR
NETWORK
ANALYZER
50⍀
VS
VOUT
RL
50⍀
*SIMILAR CONNECTION FOR ADG726
CHANNEL-TO-CHANNEL CROSSTALK = 20LOG10 (VOUT/VS)
Test Circuit 11. Channel-to-Channel Crosstalk
VDD
0.1F
VSS
0.1F
VDD VSS
A4
A0 S
D
EN
ADG732*
GND
NETWORK
ANALYZER
50⍀
VS
VOUT
RL
50⍀
INSERTION LOSS = 20 LOG VOUT WITH SWITCH
VOUT WITHOUT SWITCH
*SIMILAR CONNECTION FOR ADG726
Test Circuit 12. Bandwidth
OUTLINE DIMENSIONS
48-Lead Frame Chip Scale Package [LFCSP]
(CP-48)
Dimensions shown in millimeters
7.00
BSC SQ
0.60 MAX
0.30
0.60 MAX
0.23
0.18
PIN 1
INDICATOR
37
36
48
1
TOP
VIEW
6.75
BSC SQ
BOTTOM
VIEW
1.00 12؇ MAX
0.90
0.80
0.25
REF
SEATING
PLANE
0.50
0.40
25
0.30
24
12
13
0.70 MAX
0.65 NOM
0.50 BSC
COPLANARITY
0.05 MAX
0.02 NOM
5.50
REF
COMPLIANT TO JEDEC STANDARDS MO-220-VKKD-2
48-Lead Thin Plastic Quad Flatpack [TQFP]
(SU-48)
Dimensions shown in millimeters
1.20 MAX
0.75
0.60
0.45
COPLANARITY
0.15
0.05
0.20
0.09
9.00 BSC SQ
48
37
1
36
TOP VIEW
(PINS DOWN)
7.00
BSC
SQ
0؇
12
13
MIN
0.5
BSC
7؇
0؇
SEATING
PLANE
25
24
0.27
0.22
0.17
1.05
1.00
0.95
COMPLIANT TO JEDEC STANDARDS MS-026BBC
PIN 1
INDICATOR
5.25
4.70
2.25
–12–
REV. 0
Share Link: 