ADM222(2001) 데이터 시트보기 (PDF) - Analog Devices
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ADM222 Datasheet PDF : 8 Pages
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ADM222/ADM232A/ADM242–SPECIFICATIONS (VCC = 5 V ؎ 10%. C1–C4 = 0.1 F; all spec-
ifications TMIN to TMAX unless otherwise noted.)
Parameter
Min Typ Max Unit Test Conditions/Comments
RS-232 TRANSMITTERS
Output Voltage Swing
±5
Input Logic Threshold Low, VINL
Input Logic Threshold High, VINH
2.4
Logic Pull-Up Current
Data Rate
200
Output Resistance
300
Output Short Circuit Current (Instantaneous)
±9
1.7 0.8
1.7
12 40
± 10
V
All Transmitter Outputs Loaded with
3 kΩ to Ground
V
TIN
V
TIN
µA
TIN = 0 V
kB/s
Ω
VCC = V+ = V– = 0 V, VOUT = ± 2 V
mA
RS-232 RECEIVERS
RS-232 Input Voltage Range
–30
RS-232 Input Threshold Low
0.8
RS-232 Input Threshold High
RS-232 Input Hysteresis
0.2
RS-232 Input Resistance
3
TTL/CMOS Output Voltage Low, VOL
TTL/CMOS Output Voltage High, VOH
3.5
TTL/CMOS Output Short-Circuit Current –2
TTL/CMOS Output Short-Circuit Current 10
TTL/CMOS Output Leakage Current
EN Input Threshold Low, VINL
EN Input Threshold High, VINH
2.0
POWER SUPPLY
Power Supply Current
Shutdown Power Supply Current
SHDN Input Leakage Current
SHDN Input Threshold Low, VINL
SHDN Input Threshold High, VINH
2.0
AC CHARACTERISTICS
Transition Region Slew Rate
3
Transmitter Propagation Delay TTL to RS-232
Receiver Propagation Delay RS-232 to TTL
Receiver Output Enable Time
Receiver Output Disable Time
Transmitter Output Enable Time
Transmitter Output Disable Time
Transmitter + to – Propagation Delay Difference
Receiver + to – Propagation Delay Difference
+30 V
1.2
V
1.6 2.4 V
0.4 1.0 V
VCC = 5 V
5
7
kΩ
TA = 0°C to 85°C
0.05 0.4 V
IOUT = 3.2 mA
V
IOUT = –1.0 mA
–85
mA Source Current (VOUT = GND)*
35
mA
± 0.05 ± 10 µA
Sink Current (VOUT = VCC)*
SHDN = GND/EN = VCC
0 V ≤ VOUT ≤ VCC
1.4 0.8 V
1.4
V
4
8
mA No Load
13
mA 3 kΩ Load on Both Outputs
0.1 10
µA
±1
µA
1.4 0.8 V
1.4
V
8
30
0.85 3.5
1.0 3.5
0.1 0.5
0.3 0.5
125 500
160 500
250
3.5
150
200
V/µs CL = 50 pF to 1000 pF, RL = 3 kΩ to 7 kΩ
Measured from +3 V to –3 V or –3 V to +3 V
µs
tPHLT
µs
tPLHT
µs
tPHLR
µs
tPLHR
ns
tER
ns
tDR
µs
SHDN Goes High
µs
SHDN Goes Low
ns
ns
*Guaranteed by design, not production tested.
Specifications subject to change without notice.
–2–
REV. A
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