ADMCF326
15 14 13 12
11 10
PIODIR0 (R/W)
98
76
0000 00 00 00
54
00
321
000
0
0 DM (0x2004)
PIO0 – PIO7
0 = INPUT
1 = OUTPUT
PIODIR1 (R/W)
15 14 13 12 11 10 9
8
76
54
32
1
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DM (0x2044)
PIO8
0 = INPUT
1 = OUTPUT
15 14 13 12 11 10
PIODATA0 (R/W)
98 76
00 00 00 00
54
32 10
DM (0x2005)
PIO0 – PIO7
0 = LOW LEVEL
1 = HIGH LEVEL
PIODATA1 (R/W)
15 14 13 12 11 10 9 8 7 6 5 4
32 1 0
0000 0000 0000001
DM (0x2045)
PIO8 DATA
0 = LO
1 = HI
15 14 13 12 11 10
PIOSELECT (R/W)
98 76
54
PIO8/AUX0 MODE
3210
0 = AUX0
1 = PIO8
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 DM (0x2049)
0 = AUX1
1 = PIO7
0 = TFS1
1 = PIO0
0 = CLKOUT
1 = PIO6
0 = RFS1
1 = PIO5
0 = DT1
1 = PIO1
0 = DR1B
1 = PIO2
0 = DR1A
1 = PIO4
0 = SCLK1
1 = PIO3
Figure 22. Configuration of PIO Registers
Default bit values are shown; if no value is shown, the bit field is undefined at reset. Reserved bits are shown on a gray field—these
bits should always be written as shown.
–28–
REV. B