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ADP3192JCPZ-RL 데이터 시트보기 (PDF) - Analog Devices

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ADP3192JCPZ-RL Datasheet PDF : 32 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADP3192
EN 1
PWRGD 2
FBRTN 3
FB 4
COMP 5
SS 6
DELAY 7
VRFAN 8
VRHOT 9
TTSENSE 10
PIN 1
INDICATOR
ADP3192
TOP VIEW
(Not to Scale)
30 PWM1
29 PWM2
28 PWM3
27 PWM4
26 NC
25 SW1
24 SW2
23 SW3
22 SW4
21 IMON
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED EPAD ON BOTTOM SIDE OF PACKAGE IS AN
ELECTRICAL CONNECTION AND SHOULD BE SOLDERED TO GROUND.
Figure 5. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1
EN
Power Supply Enable Input. Pulling this pin to GND disables the PWM outputs and pulls the PWRGD output low.
2
PWRGD
Power-Good Output. Open-drain output that signals when the output voltage is outside of the proper operating range.
3
FBRTN
Feedback Return. VID DAC and error amplifier reference for remote sensing of the output voltage.
4
FB
Feedback Input. Error amplifier input for remote sensing of the output voltage. An external resistor between this
pin and the output voltage sets the no load offset point.
5
COMP
Error Amplifier Output and Compensation Point.
6
SS
Soft Start Delay Setting Input. An external capacitor connected between this pin and GND sets the soft start
ramp-up time.
7
DELAY
Delay Timer Setting Input. An external capacitor connected between this pin and GND sets the overcurrent latch-
off delay time, boot voltage hold time, EN delay time, and PWRGD delay time.
8
VRFAN
VR Fan Activation Output. Open-drain output that signals when the temperature at the monitoring point
connected to TTSENSE exceeds the programmed VRFAN temperature threshold.
9
VRHOT
VR Hot Output. Open-drain output that signals when the temperature at the monitoring point connected to
TTSENSE exceeds the programmed VRHOT temperature threshold.
10
TTSENSE
VR Hot Thermal Throttling Sense Input. An NTC thermistor between this pin and GND is used to remotely sense
the temperature at the desired thermal monitoring point.
11
ILIMIT
Current-Limit Set Point. An external resistor from this pin to GND sets the current-limit threshold of the converter.
12
RT
Frequency Setting Resistor Input. An external resistor connected between this pin and GND sets the oscillator
frequency of the device.
13
RAMPADJ PWM Ramp Current Input. An external resistor from the converter input voltage to this pin sets the internal PWM ramp.
14
LLSET
Output Load Line Programming Input. This pin can be directly connected to CSCOMP, or it can be connected to
the center point of a resistor divider between CSCOMP and CSREF. Connecting LLSET to CSREF disables positioning.
15
CSREF
Current Sense Reference Voltage Input. The voltage on this pin is used as the reference for the current sense
amplifier and the power-good and crowbar functions. This pin should be connected to the common point of the
output inductors.
16
CSSUM
Current Sense Summing Node. External resistors from each switch node to this pin sum the average inductor
currents together to measure the total output current.
17
CSCOMP
Current Sense Compensation Point. A resistor and capacitor from this pin to CSSUM determines the gain of the
current sense amplifier and the positioning loop response time.
18
GND
Ground. All internal biasing and the logic output signals of the device are referenced to this ground.
19
OD
Output Disable Logic Output. This pin is actively pulled low when the EN input is low or when VCC is below its
UVLO threshold to signal to the Driver IC that the driver high-side and low-side outputs should go low.
20
IREF
Current Reference Input. An external resistor from this pin to ground sets the reference current for IFB, IDELAY, ISS,
IILIMIT, and ITTSENSE.
Rev. 0 | Page 7 of 32

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