ADV7195KS 데이터 시트보기 (PDF) - Analog Devices

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ADV7195KS

Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs and 10-Bit Data Input

Analog Devices 

HSYNC

VSYNC

DV

PIXEL

DATA

A

Y Y YY

Cr Cr Cr Cr

AMIN = 16 CLK CYCLES (525P)

AMIN = 12 CLK CYCLES (625P)

AMIN = 44 CLK CYCLES (1080I)

AMIN = 70 CLK CYCLES (720P)

Cb Cb Cb Cb

B

BMIN = 122 CLK CYCLES (525P)

BMIN = 132 CLK CYCLES (625P)

BMIN = 236 CLK CYCLES (1080I)

BMIN = 300 CLK CYCLES (720P)

Figure 4. Input Timing Diagram

ADV7195

t3

SDA

t5

t3

t6

t1

SCL

t2

t7

t4

t8

Figure 5. MPU Port Timing Diagram

REV. A

–7–

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