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X88257J 데이터 시트보기 (PDF) - Xicor -> Intersil
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X88257J
E2 Micro-Peripheral
Xicor -> Intersil
X88257J Datasheet PDF : 15 Pages
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X88257
WR
Controlled Write Cycle
Symbol
Parameter
t
LHLL
t
AVLL
t
LLAX
t
DVWH
t
WHDX
t
ELLL
t
WLWH
t
WRS
t
WRH
t
BLC
t
WC
(7)
ALE Pulse Width
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
Chip Enable Setup Time
WR
Pulse Width
WR
Setup Time
WR
Hold Time
Byte Load Time (Page Write)
Write Cycle Time
WR
Controlled Write Timing Diagram
Min.
80
20
30
50
30
7
120
30
20
0.5
Max.
100
5
CE
ALE
A/D0–A/D7
A8–A14
WR
tLHLL
tELLL
tAVLL
AIN
tLLAX
tWRS
tWRH
tWRH
tWLWH
DIN
tDVWH
tWHDX
ADDRESS
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
µ
s
ms
6509 PGM T11
6509 ILL F07.1
Note:
(7) t
WC
is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum
time the device requires to automatically complete the internal write operation.
9
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