74LVT16500ADL(2006) 데이터 시트보기 (PDF) - Philips Electronics

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74LVT16500ADL
(Rev.:2006)

3.3 V 18-bit universal bus transceiver; 3-state

Philips Electronics 

Philips Semiconductors

74LVT16500A

3.3 V 18-bit universal bus transceiver; 3-state

VI

input CPBA

or CPAB

0V

VOH

output An or Bn

VOL

1/ fmax

VM

t WL

t PHL

VM

t WH

t PLH

VM

VM

001aaf037

Fig 6.

Measurements points are given in Table 8.

VOL and VOH are typical voltage output drop that occur with the output load.

Propagation delay clock (CPAB, CPBA) to output (An, Bn), clock (CPAB, CPBA)

pulse width and maximum clock frequency (CPAB, CPBA)

VI

input LEAB

or LEBA

0V

output

An or Bn

VOH

VOL

VM

VM

tWH

t PHL

VM

VM

t PLH

VM

001aad 310

Fig 7.

Measurements points are given in Table 8.

VOL and VOH are typical voltage output drop that occur with the output load.

Propagation delay latch enable (LEAB, LEBA) to output (An, Bn) and latch enable

(LEAB, LEBA) pulse width

OEBA VI

input

OEAB 0 V

VOH

output

An or Bn

0V

VM

VM

t PZH

VM

t PHZ

VY

001aad 344

Fig 8.

Measurements points are given in Table 8.

VOH is typical voltage output drop that occur with the output load.

3-state output enable time to HIGH-level and output disable time from HIGH-level

74LVT16500A_3

Product data sheet

Rev. 03 — 29 May 2006

© Koninklijke Philips Electronics N.V. 2006. All rights reserved.

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