Philips Semiconductors
74LVT16500A
3.3 V 18-bit universal bus transceiver; 3-state
tW
VI 90 %
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VCC
VI
PULSE
GENERATOR
VO
DUT
RT
VEXT
RL
CL
RL
001aae235
Test data is given in Table 9.
Definitions test circuit:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = Test voltage for switching times.
Fig 11. Load circuitry for switching times
Table 9.
Input
VI
2.7 V
Test data
fi
tW
≤ 10 MHz 500 ns
tr, tf
≤ 2.5 ns
Load
CL
50 pF
RL
500 Ω
VEXT
tPHZ, tPZH tPLZ, tPZL tPLH, tPHL
GND
6V
open
74LVT16500A_3
Product data sheet
Rev. 03 — 29 May 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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