EM78569 데이터 시트보기 (PDF) - ELAN Microelectronics

부품명

상세내역

제조사

EM78569

8-BIT MICRO-CONTROLLER

ELAN Microelectronics 

EM78569

8-bit Micro-controller

If enable PLL, CPU will operate at normal mode (high frequency). Otherwise, it will run at green mode

(low frequency, 32768 Hz).

PLL circuit

Sub-clock

32.768kHz

447.8293kHz ~17.9132MHz

CLK2 ~ CLK0

ENPLL

1

switch

0

System clock

Fig.7 The relation between 32.768kHz and PLL

Bit 7: Unused register. Always keep this bit to 0 or some un-expect error will happen!

The status after wake-up and the wake-up sources list as the table below.

Wakeup signal

SLEEP mode

TCC time out

IOCF bit0=1

RA(7,6)=(0,0)

+ SLEP

No function

COUNTER1 time out No function

IOCF bit1=1

COUNTER2 time out No function

IOCF bit2=2

WDT time out

Reset and jump to

address 0

PORT8(0~3)

Reset and Jump to

RE PAGE0 bit3 or address 0

bit4 or bit5 or bit6 = 1

PORT7(0~3)

Reset and Jump to

IOCF bit3 or bit4 or address 0

bit5 =1

<Note> PORT70 's wakeup function is controlled by IOCF bit 3. It's falling edge or rising edge trigger

(controlled by CONT register bit7).

PORT71 's wakeup function is controlled by IOCF bit 4. It’s falling edge trigger.

PORT72~PORT73 's wakeup function is controlled by IOCF. They are falling edge trigger.

PORT80~PORT83’s wakeup function are controlled by RE PAGE0 bit 0 ~ bit 3. They are falling

edge trigger.

PAGE1 (DAC output data register)

7

6

5

4

3

2

1

0

DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0

R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1

Bit 0 ~ Bit 7 (DA0 ~ DA7) : These 8 bit is full DAC data buffer when 8-bit resolution is selected(R7 page1 bit 7

DAREF = 0), or the least significant 8-bit data when 10 bit resolution(DAREF = 1) selected..

__________________________________________________________________________________________________________________________________________________________________

* This specification is subject to be changed without notice.

18

8/31/2004 (V4.0)

Share Link: