EPC16 데이터 시트보기 (PDF) - Altera Corporation

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EPC16

Enhanced Configuration Devices (EPC4, EPC8 & EPC16)

Altera Corporation 

Enhanced Configuration Devices (EPC4, EPC8 & EPC16) Data Sheet

Figure 2–1. Enhanced Configuration Device Block Diagram

JTAG/ISP Interface

Enhanced Configuration Device

Flash

Shared Flash

Interface

Controller

FPGA

Shared Flash Interface

The enhanced configuration device features multiple configuration

schemes. In addition to supporting the traditional passive serial (PS)

configuration scheme for a single device or a serial device chain, the

enhanced configuration device features concurrent configuration and

parallel configuration. With the concurrent configuration scheme, up to

eight PS device chains can be configured simultaneously. In the FPP

configuration scheme, 8-bits of data are clocked into the FPGA each cycle.

These schemes offer significantly reduced configuration times over

traditional schemes.

Furthermore, the enhanced configuration device features a dynamic

configuration or page mode feature. This feature allows you to

dynamically reconfigure all the FPGAs in your system with new images

stored in the configuration memory. Up to eight different system

configurations or pages can be stored in memory and selected using the

PGM[2..0] pins. Your system can be dynamically reconfigured by

selecting one of the eight pages and initiating a reconfiguration cycle.

This page mode feature combined with the external flash interface allows

remote and local updates of system configuration data. The enhanced

configuration devices are compatible with the Stratix Remote System

Configuration feature.

Altera Corporation

August 2005

2–3

Configuration Handbook, Volume 2

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