GTLP6C816APMTC(2000) 데이터 시트보기 (PDF) - Fairchild Semiconductor

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GTLP6C816APMTC
(Rev.:2000)

GTLP/LVTTL 1:6 Clock Driver

Fairchild Semiconductor 

Functional Description

The GTLP6C816A is a clock driver providing LVTTL-to-GTLP clock translation, and GTLP-to-LVTTL clock translation in the

same package. The LVTTL-to-GTLP direction is a 1:2 clock driver path with a single Enable pin (OEB). For the

GTLP-to-LVTTL direction the clock receiver path is a 1:6 buffer with a single Enable control (OEA). Data polarity is inverting

for both directions.

Truth Tables

Inputs

TTLIN

H

L

X

OEB

L

L

H

Outputs

OBn

L

H

High Z

Logic Diagram

Inputs

GTLPIN

H

L

X

OEA

L

L

H

Outputs

OAn

L

H

High Z

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