HI5634 데이터 시트보기 (PDF) - Intersil

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HI5634

High Performance Programmable Phase-Locked Loop for LCD Applications

Intersil 

HI5634

Absolute Maximum Ratings

VDDA, VDDD, VDDQ (Measured to VSS). . . . . . . . . . . . . . . . . 4.3V

Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . VSSD -0.3V to +5.5V

Analog Outputs . . . . . . . . . . . . . . . . . . VSSA -0.3V to VDDA +0.3V

Digital Pouts. . . . . . . . . . . . . . . . . . . . . VSSQ -0.3V to VDDQ +0.3V

ESD Rating

Human Body Model (Per MIL-STD-883 Method 3015.7) . . . >2kV

Operating Conditions

Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC

Voltage Range (VDDA, VDDD, VDDQ to VSS) . . . . . . 3.0V to 3.6V

Thermal Information

Thermal Resistance (Typical, Note 3)

θJA (oC/W)

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

80

Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC

Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 260oC

(SOIC - Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

3. θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications Per Operating Conditions Listed Above, Unless Otherwise Specified

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

DC SUPPLY CURRENT

Supply Current, Digital

IDDD VDDD = 3.6V

-

-

Supply Current, Output Drivers

IDDQ VDDQ = 3.6V, No Output Drivers Enabled

-

-

Supply Current, Analog

IDDA VDDA = 3.6V

DIGITAL INPUTS (SDA, SCL, PDEN, EXTFB, HSYNC, OSC, I2CADR)

-

-

Input High Voltage

VIH

Input Low Voltage

VIL

Input Hysteresis

2

-

VSS-0.3

-

0.2

-

Input High Current

IIH

VIH = VDD

Input Low Current

IIL

VIL = 0

Input Capacitance

CIN

SDA (IN OUTPUT MODE: SDA IS BIDIRECTIONAL)

-

-

-

-

-

-

Output Low Voltage

VOL IOUT = 3mA. VOH = 6.0V Maximum, as

-

-

Determined by the External Pull-up Resistor.

PECL OUTPUTS (CLK+, CLK-, CLK/2+, CLK/2-)

Output High Voltage

VOH IOUT = 0

Output Low Voltage (Note 4)

VOL IOUT = Programmed Value

SSTL_3 OUTPUTS (CLK, CLK/2, FUNC, LOCK/REF)

-

-

1.0

-

Output Resistance

AC INPUT CHARACTERISTICS

RO

1 < VO < 2V

-

-

HSYNC Input Frequency

fHSYNC

OSC Input Frequency

fOSC

TIMING CHARACTERISTICS (Note 5)

Reg 7[7] = 0

Reg 7[7] = 1

0.008

-

0.02

-

REF Output Transition Times

PECL CLK Output Transition Times

SSTL CLK Output Transition Times

FUNC Output Transition Times

HSYNC to REF Delay

REF to PECL Clock Delay

tr

Rise Time/Fall Time

tP

Rise Time/Fall Time

tS

Rise Time/Fall Time

tF

Rise Time/Fall Time

t0

t1

-

2.8/1.8

-

1.0/1.2

-

1.6/0.7

-

1.2/1.0

11.3

11.5

-1.0

0.8

MAX

25

6

5

5.5

0.8

0.6

±10

±200

10

0.4

VDD

-

80

10

100

-

-

-

-

12

2.2

UNITS

mA

mA

mA

V

V

V

µA

µA

pF

V

V

V

Ω

MHz

MHz

ns

ns

ns

ns

ns

ns

4-4

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