HY57V561620B 데이터 시트보기 (PDF) - Hynix Semiconductor

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HY57V561620B

4 Banks x 4M x 16Bit Synchronous DRAM

Hynix Semiconductor 

FUNCTIONAL BLOCK DIAGRAM

4Mbit x 4banks x 16 I/O Synchronous DRAM

HY57V561620B(L/S)T

Self Refresh Logic

& Timer

Internal Row

Counter

CLK

CKE

CS

RAS

CAS

WE

UDQM

LDQM

Row Active

Row

Pre

Decoders

Column

Active

Column

Pre

Decoders

4Mx16 Bank 3

4Mx16 Bank 2

4Mx16 Bank 1

4Mx16 Bank 0

Memory

Cell

Array

Y decoders

DQ0

DQ1

DQ14

DQ15

Bank Select

Column Add

Counter

A0

Address

A1

Register

Burst

Counter

A12

BA0

BA1

Mode Registers

CAS Latency

Data Out Control Pipe Line Control

Rev.1.4 / July 2003

4

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