ICS8344BY 데이터 시트보기 (PDF) - Integrated Device Technology

부품명

상세내역

제조사

ICS8344BY

LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER

Integrated Device Technology 

ICS8344

LOW SKEW, 1-TO-24

DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER

TABLE 5A. AC CHARACTERISTICS, VDD = VDDO = 3.3V±5%, TA = 0°C TO 70°C

Symbol Parameter

Test Conditions

Minimum Typical Maximum Units

fMAX

Output Frequency

tpLH

Propagation Delay

Low-to-High; NOTE 1

f ≤ 167MHz

2.6

167

MHz

4.3

ns

tpHL

Propagation Delay

High-to-Low; NOTE 1

f ≤ 167MHz

2.4

4.3

ns

tsk(b) Bank Skew; NOTE 2, 6

tsk(o) Output Skew; NOTE 3, 6

tsk(pp) Part-to-Part Skew; NOTE 4, 6

tR

Output Rise Time; NOTE 5

tF

Output Fall Time; NOTE 5

tPW

Output Pulse Width

Measured on the

rising edge of VDDO/2

Measured on the

rising edge of VDDO/2

Measured on the

rising edge of VDDO/2

30% to 70%

30% to 70%

f ≤ 167MHz

f = 167MHz

150

ps

275

ps

600

ps

200

1000

ps

200

1000

ps

tPeriod/2 - 0.65 tPeriod/2 tPeriod/2 + 0.65 ns

2.35

2.5

3.65

ns

tEN

Output Enable Time; NOTE 5

f = 66.7MHz

5

ns

tDIS

Output Disable TIme; NOTE 5

f = 66.7MHz

4

ns

All parameters measured at 167MHz unless noted otherwise.

NOTE 1: Measured from the differential input crossing point to the output at VDDO/2.

NOTE 2: Defined as skew within a bank of outputs at the same voltages and with equal load conditions.

NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions.

NOTE 4: Defined as the skew between outputs on different devices operating at the same supply voltages

and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at VDDO/2.

NOTE 5: These parameters are guaranteed by characterization. Not tested in production.

NOTE 6: This parameter is defined in accordance with JEDEC Standard 65.

8344BY

5

REV. A JANUARY 5, 2011

Share Link: