ISL6173DRZA-T(2005) 데이터 시트보기 (PDF) - Intersil

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ISL6173DRZA-T
(Rev.:2005)

Dual Low Voltage Hot Swap Controller

Intersil 

Block Diagram

Vin

Io

Iset Rset

Rsns

ISL6173

Q

LOAD

Vo

Iref

OCREF

Rref

Current

Limit

Amplifier

10V

24µA

Soft Start

-

Amplifier

CPVDD

+

42µA

3K

-

10µA

SS1

+

-

Css

1.178V

Current

Mirror

+ WOC

Comparator

OC Timer

+

&

Logic

CPVDD

Iref

- OC

4

Comparator

10µA

FLT1

PG1

EN1

RTR/LTCH

BIAS

CPQ+

Cp

CPQ-

CPVDD

Cv

BIAS

10K

BIAS

10K

X2

Charge

Pump

+

Timeout -

Comparator

-

UV

+

Comparator

1.178V

633mV

X2

Charge

Pump

10V(out)

CT1

Ct

Rs1

UV1

Rs2

POR and

Bandgap

633mV

1.178V

ISL6173

FIGURE 2. ISL6173 - INTERNAL BLOCK-DIAGRAM OF THE IC - CHANNEL ONE ONLY

2

FN9186.2

February 15, 2005

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