ISL83385E 데이터 시트보기 (PDF) - Intersil

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ISL83385E

±15kV ESD Protected, +3V to +5.5V, 1 Microamp, 250kbps, RS-232 Transmitters/Receivers

Intersil 

5V/DIV

SHDN

ISL83385E

5V/DIV.

T1

T1IN

2V/DIV

T1OUT

T2

VCC = +3.3V

C1 - C4 = 0.1µF

TIME (20µs/DIV)

FIGURE 3. TRANSMITTER OUTPUTS WHEN EXITING

POWERDOWN

High Data Rates

The ISL83385E maintains the RS-232 ±5V minimum

transmitter output voltages even at high data rates. Figure 4

details a transmitter loopback test circuit, and Figure 5

illustrates the loopback test result at 120kbps. For this test,

all transmitters were simultaneously driving RS-232 loads in

parallel with 1000pF, at 120kbps. Figure 6 shows the

loopback results for a single transmitter driving 1000pF and

an RS-232 load at 250kbps. The static transmitter was also

loaded with an RS-232 receiver.

VCC

0.1µF +

+

C1

+

C2

VCC

C1+

VCC

V+

C1-

ISL83385E

C2+

V-

C2-

TIN

TOUT

ROUT

RIN

5K

SHDN

+

C3

+C4

1000pF

FIGURE 4. TRANSMITTER LOOPBACK TEST CIRCUIT

R1OUT

VCC = +3.3V

C1 - C4 = 0.1µF

5µs/DIV.

FIGURE 5. LOOPBACK TEST AT 120kbps

5V/DIV.

T1IN

T1OUT

R1OUT

VCC = +3.3V

C1 - C4 = 0.1µF

2µs/DIV.

FIGURE 6. LOOPBACK TEST AT 250kbps

Interconnection with 3V and 5V Logic

The ISL83385E directly interfaces with 5V CMOS and TTL

logic families. Nevertheless, with the device at 3.3V, and the

logic supply at 5V, AC, HC, and CD4000 outputs can drive

ISL83385E inputs, but ISL83385E outputs do not reach the

minimum VIH for these logic families. See Table 4 for more

information.

7

FN6001.4

January 16, 2005

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